A Low-Voltage Stretchable Synaptic Transistor Array for Temperature Perception, Facilitated Associative Learning, and Neuromorphic Computing #MMPMID41348965
Cui D; Zhao Z; Tian F; Zheng Q; Liao X; Chen W; Zhang J; Zhou C
ACS Appl Mater Interfaces 2025[Dec]; ? (?): ? PMID41348965show ga
Stretchable synaptic transistors are promising candidates for brain-inspired neuromorphic systems in soft robotics and wearable electronics, where temperature perception and low-power operation are critical for biological fidelity and energy efficiency. However, the interplay between mechanical strain, temperature perception, and synaptic properties remains underexplored in such devices. Here, we report a high-density, temperature-modulated stretchable synaptic transistor (TM-SST) array fabricated via a photolithography-based, transfer-free process, integrating a semiconductor carbon nanotube (s-CNT) network channel and an SU-8 dielectric layer. The devices exhibit a high on-off ratio ( approximately 10(5)) at a low gate voltage (V(gs)) between +/-2.5 V and a drain-to-source voltage (V(ds)) of -0.1 V. Importantly, the devices exhibit temperature-dependent synaptic characteristics across 10-40 degrees C, with effective modulation of postsynaptic current (PSC), plasticity, memory retention, and paired-pulse facilitation (PPF), while maintaining stable performance under 40% strain. Furthermore, temperature modulation enhances neuromorphic performance: a 15 degrees C cooling improves memory retention in associative learning from seconds to minutes, while simulations show accelerated learning with a 10x dynamic range. This work advances stretchable synaptic devices by enabling temperature perception to enhance neuromorphic functionality.
ACS+Appl+Mater+Interfaces 2025 ; ? (?): ?
